1. Field of the Invention
This invention relates generally to a method for providing electrical insulating material in selected regions of a semiconductive material and more particularly to a method for fabricating an integrated circuit having electrical isolation between functional elements thereof.
2. Description of the Prior Art
Heretofore a number of methods have been used to provide isolation between functional elements in integrated circuit devices; however, most of these have proven to be either ineffective or impractical due to high cost.
A first isolating method provided isolation using back to back PN junctions. The junctions were formed by diffusing P-type impurities into an N-type epitaxial layer until the P-type diffusion extended through the entire epitaxial layer to a P-type substrate. In order to achieve high saturation currents, a layer of high concentration N-type impurity is usually formed by diffusion prior to growing the epitaxial layer. Since it is difficult to diffuse sufficient P-type impurities through the epitaxial layer to overcome the high concentration of N-type, it was essential that a mask be used during the diffusion of the N-type impurities so that the high concentration was not present in the regions where P-type impurities were to be diffused. Thus, two diffusion steps were required, each step requiring a separate mask. The need for two masks and two high temperature diffusion steps increased the cost of the fabricated device and also degraded the semiconductor material.
In an attempt to eliminate a masking operation and one of the high temperature diffusion steps, a double epitaxial layer of N-type semiconductivity was formed on a P-type substrate. A first layer had a high N-type impurity concentration and the second layer a standard N-type impurity concentration. The isolation was provided by P-type diffusion through the double epitaxial layer to the P-type substrate to form PN junctions; however, it was difficult to properly diffuse P-type impurities through the high N-type impurity concentration in the first epitaxial layer. As a result, the P-type diffusion step had to extend over periods of time that proved impractical.
In a third method for providing isolation, the silicon in the isolating region was partially etched and thereafter oxidized to form a dielectric silicon dioxide; however, it was discovered that in order to provide the proper thickness of silicon dioxide, an oxidation period of approximately 10 hours at 1,000.degree. C was required and this proved to be both time consuming and detrimental to the semiconductor material.
Another method of providing isolation required the formation of channels or valleys in a single crystal semiconductor material. A layer of polycrystalline silicon was then formed over the channels. The single crystal silicon was lapped off to expose isolating regions of polycrystalline silicon which formed a substrate having isolated regions of single crystal silicon which formed the active elements of the circuit. This lapping process proved to be extremely expensive and time consuming and did not provide a satisfactory solution to the isolation requirement.
Thus, all the prior art methods suffered from some deficiency. The methods were either time consuming, too expensive or degraded the semiconductor material due to excessive exposure to extreme temperatures.